AMD Ramps 2nm EPYC Venice CPUs on TSMC as Intel Teases 10A and Beyond
AMD announced it has begun ramping production of its 6th Gen EPYC processors, codenamed Venice, on TSMC's 2-nanometer manufacturing process. Initially being made in Taiwan, AMD says it will later shift some production to the TSMC's expanding Arizona fab site. Meanwhile, Intel CEO Lip-Bu Tan is teasing its own future roadmap that includes its 10A and 7A nodes. Folks, the chip wars are heating up.
Starting with AMD, its next-generation EPYC processors represent the first high-performance computing (HPC) product to enter production on TSMC's 2nm process technology, which AMD describes as a key milestone in the execution of its data center roadmap.
"Ramping ‘Venice’ on TSMC 2nm process technology marks an important step forward in accelerating the next generation of AI infrastructure," said Dr. Lisa Su, chair and CEO, AMD. "As AI and agentic workloads scale rapidly, customers need platforms that can move from innovation to production faster. Our deep...
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