SK Hynix Fires Back In The AI Memory Race With Next Gen 48GB HBM4E
SK hynix just announced the delivery of its 12-layer HBM4E memory samples to major hardware clients, intensifying the competition to supply the memory backbone for future AI accelerators. The new fat stacks of RAM represent a significant leap in data density and throughput, offering 48 gigabytes of capacity per single stack. By pushing transfer speeds up to 16 Gbps per-pin across the massive 2-kilobit interface width defined by the HBM4 standard, the new chips deliver upwards of 4 terabytes per second of memory bandwidth using a single stack of silicon.
Stacking twelve high-speed memory dies inherently introduces severe thermal and power constraints. To maintain structural stability and prevent heat-induced throttling during sustained workloads, SK hynix has utilized its proprietary "Advanced Mass Reflow Molded Underfill" packaging technique, or "MR-MUF." This process, which injects and cures a liquid protective material between the stacked chips, reportedly cuts thermal resistance by 17% compared...
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