IBM unveils new record-breaking chip with 100 billion transistors in less than 1 nanometer footprint — new…
- IBM pushes transistor density below the long-feared one-nanometer barrier
- NanoStack abandons flat chip layouts in favour of vertical transistor stacking
- The prototype delivered 50% more performance during IBM laboratory testing phases
IBM has unveiled what it describes as the world's first sub-1 nm chip technology, carrying nearly 100 billion transistors on a fingernail-sized surface.
The breakthrough revolves around a new 3D NanoStack architecture that moves transistor scaling into the 0.7 nm or 7 angstrom era.
For context, today's most advanced commercial chips typically sit around the 2nm mark, making this a substantial leap in density.
Building upwards to keep Moore's Law alive
The semiconductor industry has spent decades squeezing more transistors onto increasingly smaller pieces of silicon to improve computing performance.
That process has become progressively harder as transistor dimensions approach the scale of only a few atoms across modern processors.
IBM's approach avoids further horizontal compression by stacking transistor...
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