IBM stacks up a sub-nanometer chip future

https://image.theregister.com/5261595.jpg?imageId=5261595&x=0&y=0&cropw=100&croph=100&panox=0&panoy=0&panow=100&panoh=100&width=1200&height=683

Big Blue shows off process node it claims can scale down to 1 Angstrom

IBM has developed a sub-nanometer (nm) chip technology it says could be used to produce commercial chips within five years, and has mapped a path to 0.1 nm.

Big Blue claims its new process node can cram nearly 100 billion transistors onto a silicon die the size of a fingernail, almost double the density of the 2 nm technology it unveiled back in 2021.

The new process as disclosed is actually for 0.7 nm or 7 Angstroms (7A), compared with the cutting-edge manufacturing nodes now being prepared for production in 2028 by the likes of Intel and TSMC which are 1.4nm, or 14 Angstroms.

Several structural and material innovations have gone into this latest manufacturing method, including a three-dimensional nanostack architecture that sees transistors stacked, with n-type and p-type field-effect transistors (FETs) arranged so that one...

Copyright of this story solely belongs to theregister.com. To see the full text click HERE

Read more